In the mid 1980s volatile memories had been observed to degrade when in close proximity to MOSFET's operating in weak avalanche. At that time it was believed that the memories were discharged by excess minority carriers produced by a process of secondary impact ionisation in the region of the transistors. While working at Liverpool University we proposed that light emitted from a MOSFET during weak avalanche and subsequently reabsorbed created the minority carriers in the substrate¹. We confirmed this process by observing the current generated in the substrate of a bipolar transistor during emitter-base avalanche due to light emission light emission. Direct evidence of light emission from MOSFETs was provided in later work.² Interestingly, a process of impact ionisation in the neutral region of the base of a BJT transistor ³ and related to secondary impact ionisation was observed as a collective current. Surprisingly, there were no previous reports of a bipolar transistor operated in this mode.

As supply voltages to MOSFETs continued to be scaled in the 1990s hot carrier effects were more related to the energy supplied to the charge carriers in the channel than the electric field near the drain. Monte Carlo simulations reported in the literature suggested that the distribution of charge carriers in the region of energy above that provided by the drain voltage has the form of a Boltzmann distribution with an effective temperature equal to that of the lattice, T_L. However, the density of charge carriers in this region is very low and the Monte Carlo data was relatively noisy. At Birmingham University we developed a semi-analytic technique for obtaining the energy distribution function in regions of low probability⁴. Results based on this model showed the effective temperature of the energy distribution to be above T_L, only approaching the lattice temperature asymptotically.⁵A detailed physical explanation of this phenomenon and other effects were described in a later paper.⁶

Even when the drain voltage applied to MOSFETs was scaled below 3V current was still observed to flow in the gate of the device. This was unexpected as even charge carriers travelling ballistically to the drain would not have sufficient energy to overcome the potential barrier to the oxide. One possible mechanism for this was energy gain through electron-electron collisions near the drain on MOSFET. However, the inclusion of these scattering events in Monte Carlo simulations was difficult particularly for low probability events. The simulations we were undertaking at Birmingham had the advantage that they were based on an iterative technique into which electron-electron collisions could be more readily integrated. We showed that a hot carrier distribution was significantly by these interactions.^7,8,9

With the fabrication of devices having physical dimensions of the order of nanometres in the 2000s it was desirable to develop new techniques for patterning and characterisation. A novel method that we explored in conjunction with Anthony O'Neill at Newcastle University was the exploitation x-ray propagation in carbon nanotubes. An early analysis had shown that the wall of a carbon nanotube was too thin to confine x-rays within the nanotube. However, our simulations showed that suitably coated carbon nanotubes could sustain x-ray modes and therefore have potential use for patterning and analysis.¹⁰

Carbon-based electronics is of interest because of the potential for ballistic challenge transport within devices. Graphene is attractive as it is planar and compatible with silicon and established patterning techniques where is carbon nanotubes are free from edge effects. In modelling charge transport in graphene nanoribbons we observed that the accuracy of the simulation was significantly improved with the inclusion of third nearest neighbour interactions.¹¹ Our microwave studies undertaken in conjunction with Prof. Adrian Porch at Cardiff University have shown that some carbon nanotube powders suggest that enormous sheet conductivities.¹²